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= SBTSR.EXE =
 
'''SBTSR.EXE''' is a DOS terminate-and-stay-resident (TSR) utility used to configure and enable the PicoPCMCIA Card.
 
The program configures a PCMCIA socket through an Intel-compatible PCIC controller and exposes Sound Blaster compatible resources to DOS software.
 
== Download ==
 
The current release is '''Version 0.1'''. 
This version includes the limitations described below.
 
{| class="wikitable"
! File
! Version
! Download
|-
| SBTSR.EXE
| 0.1
| [{{filepath:SBTSR.EXE}} Download SBTSR.EXE]
|}
 
== Known Limitations ==
 
* Currently only works with '''Intel-compatible PCIC controllers'''.
* The program '''cannot automatically detect the controller or socket'''.
* The user must manually specify the PCIC controller and socket using command-line arguments.
* Several hardware resources are currently '''hardcoded''' in this version.
 
== Usage ==
 
Arguments are specified as a '''letter immediately followed by a value'''. 
Arguments are separated by spaces.
 
Example:
 
<pre>
SBTSR.EXE c1 s1
</pre>
 
This specifies:
 
* PCIC Controller '''1'''
* PCIC Socket '''1'''
 
Arguments may appear in any order.
 
Valid examples:
 
<pre>
SBTSR.EXE c1 s0
SBTSR.EXE s0 c1
</pre>
 
Invalid usage:
 
<pre>
SBTSR.EXE c 1 s 0
</pre>
 
== Command Line Arguments ==
 
{| class="wikitable"
! Option
! Description
! Allowed Values
! Default
|-
| '''c'''
| PCIC controller number
| 0–3
| 0
|-
| '''s'''
| PCIC socket number
| 0–3
| 0
|-
| '''i'''
| Virtual IRQ used by the Sound Blaster interface
| Any valid IRQ
| 5
|-
| '''h'''
| Hardware IRQ used by the card
| 8–15
| 10
|-
| '''n'''
| Memory window segment used by the card
| Hex segment value
| D000
|}
 
'''Note:''' The controller and socket numbers correspond to the following PCIC register offsets.
 
=== PCIC Controller Mapping ===
 
{| class="wikitable"
! Controller
! Base I/O Address
|-
| 0
| 0x3E0
|-
| 1
| 0x3E2
|-
| 2
| 0x3E4
|-
| 3
| 0x3E6
|}
 
=== PCIC Socket Mapping ===
 
{| class="wikitable"
! Socket
! Register Offset
|-
| 0
| 0x00
|-
| 1
| 0x40
|-
| 2
| 0x80
|-
| 3
| 0xC0
|}
 
== Hardware Resources ==
 
In this version several resources are currently '''hardcoded'''.
 
=== I/O Windows ===
 
{| class="wikitable"
! Window
! Address Range
|-
| I/O Window 0
| 0x240 – 0x256
|-
| I/O Window 1
| 0x300 – 0x3FF
|}
 
=== Virtual Interrupts ===
 
{| class="wikitable"
! Device
! Virtual IRQ
|-
| COM1
| 4
|-
| NE2000
| 3
|-
| Sound Blaster
| Configurable (default 5)
|}
 
== Operation ==
 
When executed, the program performs the following sequence:
 
# Configures the specified PCIC controller and socket.
# Enables the card.
# Waits for the device to become ready by polling a value in the configured memory window.
 
If the expected value is detected, the TSR installs and remains resident.
 
If the value is '''not detected''', the TSR will '''not install'''.
 
In this situation, the socket may remain in the partially configured state that was attempted during initialization.
 
== Example Commands ==
 
Use controller 0 and socket 0:
 
<pre>
SBTSR.EXE c0 s0
</pre>
 
Use controller 1 and socket 1:
 
<pre>
SBTSR.EXE c1 s1
</pre>
 
Specify custom IRQ configuration:
 
<pre>
SBTSR.EXE c1 s1 i5 h10 nD000
</pre>
 
== Notes ==
 
* Options must not contain spaces between the letter and value.
* Arguments are case-insensitive.
* The program does not automatically discover hardware configuration.

Latest revision as of 09:36, 12 March 2026

SBTSR.EXE

SBTSR.EXE is a DOS terminate-and-stay-resident (TSR) utility used to configure and enable the PicoPCMCIA Card.

The program configures a PCMCIA socket through an Intel-compatible PCIC controller and exposes Sound Blaster compatible resources to DOS software.

Download

The current release is Version 0.1. This version includes the limitations described below.

File Version Download
SBTSR.EXE 0.1 Download SBTSR.EXE

Known Limitations

  • Currently only works with Intel-compatible PCIC controllers.
  • The program cannot automatically detect the controller or socket.
  • The user must manually specify the PCIC controller and socket using command-line arguments.
  • Several hardware resources are currently hardcoded in this version.

Usage

Arguments are specified as a letter immediately followed by a value. Arguments are separated by spaces.

Example: 

SBTSR.EXE c1 s1

This specifies:

  • PCIC Controller 1
  • PCIC Socket 1

Arguments may appear in any order.

Valid examples: 

SBTSR.EXE c1 s0
SBTSR.EXE s0 c1

Invalid usage: 

SBTSR.EXE c 1 s 0

Command Line Arguments

Option Description Allowed Values Default
c PCIC controller number 0–3 0
s PCIC socket number 0–3 0
i Virtual IRQ used by the Sound Blaster interface Any valid IRQ 5
h Hardware IRQ used by the card 8–15 10
n Memory window segment used by the card Hex segment value D000

Note: The controller and socket numbers correspond to the following PCIC register offsets.

PCIC Controller Mapping

Controller Base I/O Address
0 0x3E0
1 0x3E2
2 0x3E4
3 0x3E6

PCIC Socket Mapping

Socket Register Offset
0 0x00
1 0x40
2 0x80
3 0xC0

Hardware Resources

In this version several resources are currently hardcoded.

I/O Windows

Window Address Range
I/O Window 0 0x240 – 0x256
I/O Window 1 0x300 – 0x3FF

Virtual Interrupts

Device Virtual IRQ
COM1 4
NE2000 3
Sound Blaster Configurable (default 5)

Operation

When executed, the program performs the following sequence:

  1. Configures the specified PCIC controller and socket.
  2. Enables the card.
  3. Waits for the device to become ready by polling a value in the configured memory window.

If the expected value is detected, the TSR installs and remains resident.

If the value is not detected, the TSR will not install.

In this situation, the socket may remain in the partially configured state that was attempted during initialization.

Example Commands

Use controller 0 and socket 0: 

SBTSR.EXE c0 s0

Use controller 1 and socket 1: 

SBTSR.EXE c1 s1

Specify custom IRQ configuration: 

SBTSR.EXE c1 s1 i5 h10 nD000

Notes

  • Options must not contain spaces between the letter and value.
  • Arguments are case-insensitive.
  • The program does not automatically discover hardware configuration.
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